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Analog Front Ends

An analog front end, or AFE, prepares a real-world signal for an ADC, comparator, control loop, or protection circuit. It may include protection, filtering, gain, offset, buffering, isolation, and calibration points.

Learning Objectives

By the end of this lesson, you should be able to define an AFE signal range, scale it to an ADC input, add protection and filtering, choose an op-amp or instrumentation amplifier, and review noise, impedance, and accuracy limits.

AFE Signal Chain

flowchart LR S[Sensor or input] --> P[Protection] P --> F[RC or active filter] F --> G[Gain and offset] G --> B[ADC buffer] B --> A[ADC input] R[Reference] --> A C[Calibration] --> G

A good AFE design begins with the signal, not the op-amp. Define the physical quantity, voltage or current range, source impedance, bandwidth, fault conditions, required accuracy, and calibration method.

Scaling to the ADC

An ADC code is related to input voltage by:

$$
Code \approx \frac{V_{IN}}{V_{REF}}(2^N - 1)
$$

The ideal least significant bit is:

$$
LSB = \frac{V_{REF}}{2^N}
$$

For a 12-bit ADC with VREF = 3.3 V:

$$
LSB = \frac{3.3 V}{4096} = 0.806 mV
$$

If the sensor span is only 100 mV, use gain or a lower reference so the useful signal covers more ADC codes.

Input Protection

Protection must handle normal signals and credible faults without ruining measurement accuracy.

Common elements:

  • series resistor to limit clamp current;
  • low-leakage TVS or ESD diode for connector inputs;
  • RC low-pass filter for noise;
  • Schottky clamps to safe rails when allowed;
  • resettable fuse or current limit for powered external sensors.

For a clamp current limit:

$$
R_{series} \ge \frac{V_{fault} - V_{clamp}}{I_{limit}}
$$

Check leakage. A high-value sensor node can be shifted by nanoamps of protection leakage.

Filtering and Anti-Alias Design

The ADC cannot distinguish a real low-frequency signal from an aliased high-frequency signal. Add an anti-alias filter before sampling.

For a first-order RC filter:

$$
f_c = \frac{1}{2\pi RC}
$$

Choose fc below the Nyquist frequency:

$$
f_{Nyquist} = \frac{f_s}{2}
$$

For slow sensors, a simple RC filter may be enough. For precision or higher-order attenuation, use an active filter and verify op-amp bandwidth and stability.

Source Impedance and ADC Sampling

Many MCU ADCs use a switched sampling capacitor. During acquisition, the external circuit must charge that capacitor quickly enough.

Problems occur when:

  • source impedance is too high;
  • RC filter resistance is too large;
  • acquisition time is too short;
  • multiple ADC channels have very different voltages and cause charge sharing.

Use a buffer op-amp or lower filter resistance when the datasheet recommends a maximum source impedance.

Gain and Offset

Single-supply systems often need offset so bipolar or AC signals fit into 0 V to VREF.

For a non-inverting gain stage:

$$
A_v = 1 + \frac{R_f}{R_g}
$$

For an inverting stage:

$$
A_v = -\frac{R_f}{R_{in}}
$$

Check output saturation. A rail-to-rail op-amp still cannot always reach exactly 0 V or VCC under load.

Worked Example: 0 V to 10 V Input into 3.3 V ADC

Goal: measure a 0 V to 10 V industrial signal with a 3.3 V ADC.

Use a divider ratio of about 0.3:

$$
V_{ADC} = 10 V \times \frac{10 k\Omega}{22 k\Omega + 10 k\Omega} = 3.125 V
$$

This leaves headroom below 3.3 V. Add:

  • series resistance and clamp protection;
  • RC filter after the divider;
  • buffer if ADC source impedance is too high;
  • calibration because resistor tolerance affects gain.

Noise and Accuracy Budget

Include:

  • sensor tolerance;
  • resistor divider tolerance;
  • op-amp offset and drift;
  • input bias current error;
  • reference tolerance and drift;
  • ADC gain, offset, INL, and DNL;
  • thermal noise and external interference.

For resistor thermal noise over bandwidth B:

$$
e_n = \sqrt{4kTRB}
$$

where k is Boltzmann's constant, T is kelvin, R is ohms, and B is hertz.

Layout Rules

  • Keep high-impedance analog nodes short and guarded from switching traces.
  • Separate noisy power loops from analog input paths.
  • Place RC filters and protection near the connector when they stop external noise.
  • Place ADC reference decoupling close to the reference pin.
  • Use a quiet return path; do not force sensor current through digital ground bounce.
  • Keep op-amp feedback loops compact.

Common Mistakes

  • Scaling voltage correctly but exceeding ADC source impedance.
  • Using a rail-to-rail op-amp outside its common-mode range.
  • Placing protection after a sensitive high-impedance node.
  • Ignoring reference accuracy while chasing ADC bit count.
  • Sampling too fast for the input RC to settle.
  • Sharing analog and motor return current through the same narrow trace.

Summary

An analog front end is a complete measurement path: protection, scaling, filtering, gain, buffering, reference, ADC sampling, and layout. The design is correct only when it survives faults, fits the ADC range, settles in time, meets noise and accuracy needs, and can be verified on real hardware.

Further Reading

  • Analog Devices, "Data Conversion Handbook."
  • Texas Instruments, "Op Amps for Everyone."
  • Microchip, "ADC Input Circuit Evaluation."
  • Analog Devices MT-031 and MT-101 on grounding and decoupling.

Mind Map

mindmap root((Analog front end)) Core concept Prepare signal Protect ADC Preserve accuracy Applications Sensor inputs Industrial voltage Current sensing Audio capture Formulas Code equals Vin over Vref times counts LSB equals Vref over 2 to N fc equals 1 over 2 pi R C Av equals 1 plus Rf over Rg Design rules Scale with headroom Filter before sample Buffer high impedance Use stable reference Practical checks Source impedance Settling time Offset drift Fault current Common mistakes Too high R No anti alias Op amp saturation Bad return path