Regulators, Sequencing, and Power Integrity

Embedded systems often need several rails: input voltage, logic, analog, radio, memory, sensor, and core supplies. Regulator choice, sequencing, decoupling, and layout determine whether those rails remain stable during startup, load steps, sleep transitions, and faults.

Learning Objectives

By the end of this lesson, you should be able to choose between LDO and switching regulators, estimate losses, plan rail sequencing, use decoupling correctly, calculate target impedance, and verify rails under realistic load changes.

Regulator Selection

LDOs are simple and quiet but waste voltage drop as heat:

[
P_{LDO}=(V_{IN}-V_{OUT})I_{OUT}
]

Switching regulators are efficient but add ripple, EMI, layout sensitivity, and compensation requirements.

Approximate output power:

[
P_{OUT}=V_{OUT}I_{OUT}
]

Input power for efficiency (\eta):

[
P_{IN}=\frac{P_{OUT}}{\eta}
]

Sequencing

Some MCUs, FPGAs, radios, and memories require rails to rise in a specific order or within timing limits. Check datasheets for:

absolute maximum voltage between pins;
core before I/O requirements;
reset release timing;
enable-pin thresholds;
power-good signals;
back-powering through GPIO or ESD diodes.

flowchart LR VIN --> Buck5[5 V buck] Buck5 --> LDO33[3.3 V LDO] Buck5 --> Core[1.2 V buck] LDO33 --> Reset[Reset supervisor] Core --> Reset Reset --> MCU[MCU released]

Decoupling and Bulk Energy

Use local ceramic capacitors near IC supply pins and bulk capacitance near load groups. Capacitors must be placed to minimize loop inductance.

Target impedance:

[
Z_{TARGET}=\frac{\Delta V}{\Delta I}
]

If a rail may droop (60\text{ mV}) during a (300\text{ mA}) load step:

[
Z_{TARGET}=0.06/0.3=0.2\Omega
]

Brownout and Load Steps

Brownout happens when the rail falls below the device's safe operating voltage. Use reset supervisors or MCU brownout detection so firmware does not run unpredictably during weak supply conditions.

Verify load steps from radios, motors, displays, flash writes, and wake-from-sleep transitions.

Practical Review Checklist

Every rail has current, tolerance, and startup requirements.
LDO heat is calculated at worst-case input voltage.
Switcher layout follows datasheet hot-loop guidance.
Output capacitors match stability requirements.
Enable and power-good signals are connected intentionally.
Brownout/reset thresholds are compatible with rail limits.

Common Mistakes

Using an LDO where voltage drop creates too much heat.
Substituting output capacitors without checking regulator stability.
Ignoring back-power through signal pins when one rail is off.
Measuring ripple with a long probe ground lead.
Releasing reset before all required rails are valid.

Summary

Power integrity is not just regulator selection. It includes heat, efficiency, sequencing, decoupling, target impedance, load-step response, and reset behavior.

Mind Map

mindmap root((Embedded rails)) Core concept Stable rails enable logic Sequencing protects ICs Decoupling supplies edges Applications MCU board Radio module FPGA rail Sensor supply Formulas LDO loss from voltage drop times current Pout=Vout times Iout Pin=Pout over efficiency Ztarget=dV over dI Design rules Check heat Follow capacitor spec Use power good Avoid back power Practical checks Startup order Ripple at load Load step Brownout threshold Common mistakes LDO overheats ESR ignored Reset too early Bad probing