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Mixed-Signal Grounding and Layout

Mixed-signal design connects quiet analog measurements to noisy digital logic. The goal is not to create a magic separate ground; the goal is to control return currents, loop area, references, and placement so switching energy does not corrupt small analog signals.

Learning Objectives

By the end of this lesson, you should be able to:

  • explain why ground has impedance;
  • choose a practical grounding strategy for ADC and DAC circuits;
  • place references, filters, and decoupling near converters;
  • route analog inputs without coupling switching noise;
  • verify mixed-signal layout during bring-up.

Return Current

Every signal current has a return path. At low frequency, return current spreads through the path of lowest resistance. At high frequency, it tends to follow the path of lowest inductance, usually directly under the signal trace on a continuous reference plane.

If a digital clock crosses a split plane, its return current must detour. That detour creates loop area, radiates noise, and can inject errors into analog measurements.

flowchart LR SENSOR["Sensor input"] --> RC["RC or EMI filter"] --> ADC["ADC input"] --> MCU["MCU or FPGA"] REF["Voltage reference"] --> ADC SUP["Regulator"] --> ADC SUP --> MCU NOISE["Switching regulator and clocks"] -. "keep away" .-> ADC

The induced voltage across unwanted inductance is:

$$
V_L=L\frac{di}{dt}
$$

A short ground feature that looks harmless at DC can create measurable error when fast digital current changes through it.

Grounding Strategy

For most embedded boards, a solid ground plane with careful placement is a better starting point than split planes. Splits can help in specialized designs, but they often create worse problems when signals cross the split.

Use functional zones:

Zone Keep nearby
Sensor connector protection, EMI filter, bias components
ADC front end input RC, driver amplifier, reference decoupling
Digital control MCU, FPGA, clocks, fast buses
Power conversion switching regulator, inductor, diode or FET loop

Keep high di/dt loops physically small: regulator switch node, input capacitor loop, MOSFET or diode loop, motor driver loop, and fast output drivers. Keep high-impedance analog nodes short and guarded from those loops.

Reference and Decoupling

ADC accuracy depends on the reference and input network. A reference pin is not just a DC voltage; it supplies dynamic charge during conversion.

Practical rules:

  • place reference decoupling close to the ADC reference pin;
  • follow datasheet capacitor value and ESR guidance;
  • route the reference as a quiet analog net;
  • keep high-current loads off the reference;
  • use Kelvin routing for small shunt or bridge signals.

Input Filtering

A first-order input filter has:

$$
f_c = \frac{1}{2\pi RC}
$$

Check both noise filtering and acquisition settling. A SAR ADC input often samples charge onto an internal capacitor. If source impedance is too high, the input may not settle before conversion.

For an N-bit conversion, a common settling target is less than half an LSB:

$$
V_\text{error}<\frac{V_\text{FS}}{2^{N+1}}
$$

This is why a filter resistor that works for noise may still be too large for a fast SAR ADC input.

Layout Pattern

flowchart LR CONN["Sensor connector"] --> PROT["Protection and EMI filter"] PROT --> AFE["Amplifier or RC"] AFE --> ADC["ADC plus reference"] ADC --> MCU["MCU or FPGA"] PWR["Switching power"] -. "keep loops away" .-> ADC CLK["Clocks and buses"] -. "do not route under" .-> AFE

Read the board in this order during review: source, protection, analog front end, converter, digital interface, and return path. If the physical layout forces the return current through an unrelated noisy zone, the schematic is not enough.

Layout Review Checklist

  1. ADC, reference, and input filter are close together.
  2. Sensor return does not share a long path with motor, relay, radio, or switching-regulator current.
  3. No clock or switching node runs under the ADC input or reference.
  4. Decoupling capacitors connect with short loops.
  5. Differential pairs stay symmetric and close.
  6. Test points exist for input, reference, supply, and ground.

Bring-Up Tests

  1. Log ADC codes with all noisy loads disabled.
  2. Enable each motor, relay, radio, display, or switching supply one at a time.
  3. Probe the ADC reference with a short ground spring, not a long probe lead.
  4. Compare readings with the sensor shorted, open, and connected.
  5. Check whether touching the cable shield, enclosure, or ground changes the reading.
  6. Repeat at temperature and supply extremes if the product environment requires it.

Common Mistakes

  • Splitting ground without checking return-current paths.
  • Routing digital clocks across analog inputs.
  • Treating the ADC reference like an ordinary supply rail.
  • Placing the input RC filter far from the ADC.
  • Forgetting SAR ADC source-impedance limits.

Summary

Mixed-signal layout is controlled current routing. Use a solid reference plane, thoughtful placement, short decoupling loops, quiet reference routing, and filtered inputs. Verify the real board with loads, clocks, radios, and power converters active.

Further Reading

  • Analog Devices MT-031: grounding data converters.
  • Texas Instruments mixed-signal layout guidelines for ADCs.
  • Henry Ott, Electromagnetic Compatibility Engineering.

Mind Map

mindmap root((Mixed Signal Layout)) Core concept Ground has impedance Return current matters Solid plane usually best Placement controls noise Formulas fc equals 1 over 2 pi R C Settle below half LSB Loop voltage equals L di dt Error less than Vfs over 2^(N plus 1) Applications ADC front end DAC output Sensor bridge Current shunt Design rules Reference close to ADC Short decoupling loops No clocks under inputs Separate noisy power zone Practical checks Probe reference noise Enable motors and radios Check source impedance Inspect return paths Common mistakes Bad split ground Shared sensor return Remote filter Reference used as supply