I²C — Inter-Integrated Circuit

I²C, pronounced eye-squared-see, is a two-wire serial bus for connecting several low-to-medium-speed chips on the same board. Sensors, EEPROMs, RTCs, GPIO expanders, ADCs, DACs, and small displays commonly use it because one master can talk to many devices without giving every device a separate chip-select wire.

Learning Objectives

By the end of this lesson, you should be able to:

• explain why I²C uses open-drain SDA and SCL lines with pull-up resistors;
• calculate 7-bit address bytes for read and write transfers;
• describe START, STOP, repeated START, ACK, and NACK conditions;
• choose practical pull-up values and bus speeds;
• debug common I²C failures using a scanner, oscilloscope, or logic analyzer.

The Core Idea

I²C has two shared signals:

Every device listens to the same bus. The master begins each transaction with a device address, so no separate chip-select wire is needed.

Open-Drain Signaling

I²C devices do not drive the bus high. Each output is open-drain or open-collector:

• To send 0, a device pulls the line low.
• To send 1, the device releases the line.
• Pull-up resistors bring the released line back to VCC.

This lets several devices share the same wire without fighting each other. If one device pulls low while another releases high, the line is safely low. That property is used for ACK bits and multi-master arbitration.

Pull-Up Resistor Choice

Pull-ups must be strong enough to charge bus capacitance before the next clock edge, but not so strong that devices exceed their low-level sink-current rating.

Important relationships:

Worked example: a 3.3 V bus uses 4.7 kOhm pull-ups and has about 100 pF bus capacitance.

I_LOW = 3.3 V / 4.7 kOhm = 0.70 mA
t_rise approx 0.8473 * 4.7 kOhm * 100 pF = 0.40 us

That is usually fine for 100 kHz standard-mode I²C. For 400 kHz fast mode, long wires or many modules may need stronger pull-ups such as 2.2 kOhm, but always check the device current rating.

START, STOP, and Data Bits

When SCL is high, a data transition on SDA has special meaning:

• START: SDA falls while SCL is high.
• STOP: SDA rises while SCL is high.
• During normal data transfer, SDA changes only while SCL is low.

title "I2C control conditions"
time start=0 end=8 unit=us divisions=8

SCL: square label="SCL" low=0 high=1 duty=50 cycles=4 unit=logic color=#2563eb
SDA: step label="SDA" low=0 high=1 at=1 unit=logic color=#16a34a

marker START at=1 label="START"
marker STOP at=7 label="STOP"

The waveform is explanatory. Real edges depend on pull-up value, bus capacitance, device output resistance, and probe loading.

Address Byte and R/W Bit

Most I²C devices use a 7-bit address. The address byte sent on the bus contains the 7-bit address in bits 7 through 1 and the read/write bit in bit 0.

address_byte = (address_7bit << 1) | rw
rw = 0 for write
rw = 1 for read

Worked example for a device at 0x68:

This is why datasheets and scanner tools can look confusing: one source may report the 7-bit address 0x68, while another may show the 8-bit write byte 0xD0.

ACK and NACK

After every byte, the receiver controls the ninth clock bit:

• ACK: receiver pulls SDA low to say the byte was accepted.
• NACK: receiver leaves SDA high.

NACK is not always an error. During a read, the master NACKs the final byte to tell the slave, "I am done reading."

Write and Read Transactions

A typical register write:

A typical register read uses a repeated START so the master can first select the register, then read without releasing the bus:

Speed Modes

Start at 100 kHz when bringing up unknown wiring. Increase speed only after the scanner, register reads, and signal edges look healthy.

Practical Checks

• Confirm SDA and SCL idle high with a meter or scope.
• Run an I²C scanner before writing device-specific firmware.
• Check whether breakout boards already include pull-ups; too many modules in parallel make the effective pull-up too low.
• Keep wires short. I²C is intended mainly for board-level or short-cable links.
• Verify address pins such as ADDR, SA0, or A0 match the address used in firmware.
• Check voltage compatibility before mixing 5 V and 3.3 V boards.

Common Mistakes

• Using the 8-bit address byte where the driver expects a 7-bit address.
• Forgetting pull-up resistors or accidentally adding too many parallel pull-ups.
• Assuming two identical sensors can share the bus without changing one address.
• Running 400 kHz over long jumper wires and blaming the library.
• Missing the repeated START requirement for register reads.
• Ignoring clock stretching on devices that temporarily hold SCL low.

Summary

I²C saves pins by sharing two open-drain wires across many addressed devices. Reliable I²C depends on correct pull-ups, compatible voltage levels, reasonable bus capacitance, the correct 7-bit address, and a clean transaction sequence. When it fails, debug the electrical idle state and ACK behavior before debugging application code.

Further Reading

• NXP, UM10204 I²C-bus specification and user manual.
• Texas Instruments, I²C Bus Pullup Resistor Calculation application report.
• Microchip, I²C and SMBus application notes for MCU peripherals.
• Saleae, I²C protocol analyzer documentation.

Mind Map